A network processor generally controls the flow of packets between a physical transmission medium, such as a physical layer portion of, e.g., an asynchronous transfer mode (ATM) network or synchronous optical network (SONET), and a switch fabric in a router or other type of packet switch. Such routers and switches generally include multiple network processors, e.g., arranged in the form of an array of line or port cards with one or more of the processors associated with each of the cards.
Certain network processors may be configured to support the processing of a variety of different types of data traffic, such as ATM cells, Internet Protocol (IP) packets, as well as other types of packet-based traffic. The ATM traffic is typically in the form of fixed-length 53-byte cells, each including a 5-byte header and a 48-byte payload, while the IP traffic generally comprises variable-length packets. ATM cells and IP packets may be viewed as examples of what are more generally referred to herein as PDUs.
Operation, administration and maintenance (OAM) functions within the network processor may be provided in accordance with an established protocol, such as ITU-T Recommendation I.610, “B-ISDN Operation and Maintenance Principles and Functions,” February 1999, which is incorporated by reference herein.
One type of OAM function relates to continuity checking of network connections. For example, the I.610 Recommendation provides such a continuity check in the ATM context by requiring that a given connection be monitored for incoming user cells, and that a timeout be reported if no cell is received for a period of 3.5 seconds +/−0.5 seconds. Such a connection is an example of what is more generally referred to herein as a “flow.” A number of other OAM standards, such as those that are currently evolving for multi-protocol label switching (MPLS), provide a similar continuity check mechanism.
A problem associated with the provision of OAM functionality in a network processor is that the above-described continuity check is typically implemented in a manner that either consumes an excessive amount of on-chip memory, that is, memory internal to the network processor, or requires an unduly large number of accesses to a memory external to the network processor. These conditions negatively impact the network processor in terms of factors such as size, complexity, power consumption and cost, while also limiting processor throughput performance.
Accordingly, a need exists for an improved technique for implementing a continuity check in a network processor.